The case of the new NX bit in AMD64 processors (and more recently in new Pentiums) was an issue, not in LimeWire itself, but in the JVM that internally generates and uses self-modifying code (in the JIT compiler that compiles the Java Bytecode into native assembly, and then immediately starts running it). Support for it has been patched by Sun (there were tricky cases where a page of memory could be allocated to store the generated assembly, where the page was R/W data and initially not intended to be executable; the CPU driver for Windows is in charge of loading shared program pages in read-only executable mode, and this part of the code is where the Kernel memory mamager collaborates with a CPU-specific driver)
Initially there's a compatibility mode where all pages are executable, but the interest of the NX bit comes only when the OS candetermine which page is effectively data, and which page contains valid code. A basic implementation can assume that writable pages are not executable because they are normally not shareable without synchronization across processes; and the OS program loader normally loads pages of program code sections in read-only executable memory. (In rtecent kernels of Windows, these pages are, as much as possible supported by memory-mapped file fragments (unless the file's code need to be patched b the program loader, for example if a DLL is compiled with a base address which conflicts with pages of other DLLs).
For the case of JIT in Java, the program loader does not offer help, because the code is not backed by a file (this uses traditional Virtual memory allocator). Don't forget that JIT needs to collaborate with the Java garbage collector, so pages of memory may need to change of status. For security in recent versions of the JVM, there are now different pools of memory pages to avoid sollicitating the OS VM manager which is in charge of setting the NX bit and other access restrictions (including process isolation) within page descriptors that can be used natively by the processor's builtin descriptors cache. |